|ENS-76 VCO OPTION 1
The design goal for VCO Option 1 was to make a VCO with standard features that is as accurate and drift free as possible. The basic oscillator (IC-2 and IC-4) is a sawtooth generator based on the VCO described by Terry Mikaulic in EN#62. This basic oscillator is driven by an exponential current source based upon the Analog Devices type AD818 matched NPN pair, which is probably the best exponential (log) transistor pair available. The output of the basic oscillator is a zero to +5 volt ramp (output pin 6 of IC-2). The rest of the circuit consists of waveshapers that are more or less standard, and provide Saw, Triangle, Square, Pulse, and Sine outputs, all with ± 5 volt levels. It is easy to convert this one to ± 10 volt levels if this is desired. The circuit also has inputs for Linear Frequency Modulation, and for standard Pulse Width Modulation.
The exponential current source (IC-1, IC-3, T1 & T2) is a standard design which we have used many times before. Here we have improved things as much as possible by using the CA3140 op-amp to regulate the reference current, and the AD818 pair as the converting transistors. No provisions are made here for high end compensation of the exponential stage, but standard temperature compensation is made.
The basic oscillator is a sawtooth (ramp) relaxation oscillator formed from IC-2 and IC-4, and is only slightly changed from the original Mikulic design. IC-2 forms an integrator where the exponential current from the collector of T2 causes capacitor C1 to charge. For the moment, assume that R* is zero ohms. When the output of IC-2 reaches +5, the voltage on pin 2 of IC-4 is the same as the reference on pin 3 (as determined by voltage divider R13-Rl4), and as the voltage starts to rise above +5, comparator IC-4 goes from -15 to ground (pulled up by R15). This turns on the FET switch T3, and capacitor Cl begins to discharge rapidly. In general, the capacitor would discharge a little below +5 and the comparator would then shut off the FET switch. This would result in an output consisting of a high frequency oscillation of low amplitude centered about +5. This is where the capacitor C4 comes in. When the comparator switches high (to ground that is), the capacitor voltage is +20 volts (-15 from the comparator, and +5 fed in from the ramp through R12). This will cause to comparator to remain high until C4 discharges to +5 volts (starting at +20 and being discharged through.Rl2 to pin 6 of IC-2, which is going from +5 to zero). The time constant is thus something like 1.4 x Rl2 x C4, which is something like 400 ns. This is the time interval during which the FET switch will be on. This is long enough to completely discharge the capacitor for all practical purposes. Note finally that the discharge can be initiated a little early by the Sync. control input. A negative going pulse here will lower the reference a bit and institute the reset cycle.
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